From d970d599f6be14b20444b7ecfe6d9d8001ccc689 Mon Sep 17 00:00:00 2001 From: David Garske Date: Tue, 27 Oct 2026 17:36:55 -0700 Subject: [PATCH] nai_68int6: enable LPSS I2C0 and declare the board I2C0/GSPI0 devices in the DSDT --- docs/Targets.md | 2 +- include/x86/acpi_dsdt.h | 73 +++++++++++++++++++++++-- include/x86/gpio_config.h | 109 ++++++++++++++++++++++++++++++++++++++ src/x86/acpi_dsdt.asl | 91 ++++++++++++++++++++++++++++++- src/x86/tgl_fsp.c | 2 + 5 files changed, 271 insertions(+), 6 deletions(-) diff --git a/docs/Targets.md b/docs/Targets.md index b458dd969e..7130cbe4fe 100644 --- a/docs/Targets.md +++ b/docs/Targets.md @@ -8942,7 +8942,7 @@ Notable options in [config/examples/nai_68int6.config](../config/examples/nai_68 | Option | Meaning | |---|---| | `X86_UART_NUMBER=2` | LPSS UART2 for all three FSP phases (Kontron uses 0) | -| `ACPI=1` | Required. Generates ACPI tables (RSDP/XSDT/FADT/MADT/MCFG and a minimal DSDT); the board's PCI interrupt routing is only in the DSDT `_PRT`, since the MP table is the Kontron one | +| `ACPI=1` | Required. Generates ACPI tables (RSDP/XSDT/FADT/MADT/MCFG and a minimal DSDT); the board's PCI interrupt routing is only in the DSDT `_PRT`, since the MP table is the Kontron one. The DSDT also declares the board devices on LPSS I2C0 (EEPROMs, RTC/watchdog) and GSPI0 (the PRC, for NAI's `naigspi` driver) | | `ANTI_ROLLBACK=1` | Persistent version floor and boot audit counters in TPM NV | | `MEASURED_BOOT=1`, `MEASURED_PCR_OS=4` | Firmware into PCR 0, the verified OS image into PCR 4 | | `WOLFBOOT_BOOT_DISK=0` | Boot from GPT partitions; the A/B indices (sda3/sda4) are set in `src/update_disk.c` | diff --git a/include/x86/acpi_dsdt.h b/include/x86/acpi_dsdt.h index 71b4ebbc20..af6aa92c94 100644 --- a/include/x86/acpi_dsdt.h +++ b/include/x86/acpi_dsdt.h @@ -22,10 +22,10 @@ * Regenerate: iasl src/x86/acpi_dsdt.asl && * xxd -i -n acpi_dsdt_aml src/x86/acpi_dsdt.aml (append below this header). */ static const unsigned char acpi_dsdt_aml[] = { - 0x44, 0x53, 0x44, 0x54, 0x1e, 0x02, 0x00, 0x00, 0x02, 0x48, 0x57, 0x4f, + 0x44, 0x53, 0x44, 0x54, 0x29, 0x05, 0x00, 0x00, 0x02, 0xa7, 0x57, 0x4f, 0x4c, 0x46, 0x42, 0x54, 0x4e, 0x41, 0x49, 0x54, 0x47, 0x4c, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x49, 0x4e, 0x54, 0x4c, 0x28, 0x06, 0x23, 0x20, - 0x10, 0x49, 0x1f, 0x5f, 0x53, 0x42, 0x5f, 0x5b, 0x82, 0x41, 0x1f, 0x50, + 0x10, 0x44, 0x50, 0x5f, 0x53, 0x42, 0x5f, 0x5b, 0x82, 0x4c, 0x4f, 0x50, 0x43, 0x49, 0x30, 0x08, 0x5f, 0x48, 0x49, 0x44, 0x0c, 0x41, 0xd0, 0x0a, 0x08, 0x08, 0x5f, 0x43, 0x49, 0x44, 0x0c, 0x41, 0xd0, 0x0a, 0x03, 0x08, 0x5f, 0x53, 0x45, 0x47, 0x00, 0x08, 0x5f, 0x42, 0x42, 0x4e, 0x00, 0x08, @@ -67,6 +67,71 @@ static const unsigned char acpi_dsdt_aml[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, - 0x79, 0x00 + 0x79, 0x00, 0x5b, 0x82, 0x49, 0x25, 0x49, 0x32, 0x43, 0x30, 0x08, 0x5f, + 0x41, 0x44, 0x52, 0x0c, 0x00, 0x00, 0x15, 0x00, 0x5b, 0x82, 0x43, 0x0c, + 0x45, 0x45, 0x50, 0x32, 0x08, 0x5f, 0x48, 0x49, 0x44, 0x0d, 0x31, 0x35, + 0x41, 0x43, 0x30, 0x30, 0x30, 0x32, 0x00, 0x08, 0x5f, 0x43, 0x49, 0x44, + 0x0d, 0x50, 0x52, 0x50, 0x30, 0x30, 0x30, 0x31, 0x00, 0x08, 0x5f, 0x44, + 0x44, 0x4e, 0x0d, 0x4e, 0x41, 0x49, 0x20, 0x4d, 0x6f, 0x74, 0x68, 0x65, + 0x72, 0x62, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x45, 0x45, 0x50, 0x52, 0x4f, + 0x4d, 0x00, 0x08, 0x5f, 0x43, 0x52, 0x53, 0x11, 0x26, 0x0a, 0x23, 0x8e, + 0x1e, 0x00, 0x02, 0x00, 0x01, 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0xa0, + 0x86, 0x01, 0x00, 0x56, 0x00, 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x50, 0x43, + 0x49, 0x30, 0x2e, 0x49, 0x32, 0x43, 0x30, 0x00, 0x79, 0x00, 0x08, 0x5f, + 0x44, 0x53, 0x44, 0x12, 0x41, 0x05, 0x02, 0x11, 0x13, 0x0a, 0x10, 0x14, + 0xd8, 0xff, 0xda, 0xba, 0x6e, 0x8c, 0x4d, 0x8a, 0x91, 0xbc, 0x9b, 0xbf, + 0x4a, 0xa3, 0x01, 0x12, 0x39, 0x03, 0x12, 0x1b, 0x02, 0x0d, 0x63, 0x6f, + 0x6d, 0x70, 0x61, 0x74, 0x69, 0x62, 0x6c, 0x65, 0x00, 0x0d, 0x61, 0x74, + 0x6d, 0x65, 0x6c, 0x2c, 0x32, 0x34, 0x63, 0x30, 0x32, 0x00, 0x12, 0x0b, + 0x02, 0x0d, 0x73, 0x69, 0x7a, 0x65, 0x00, 0x0b, 0x00, 0x01, 0x12, 0x0e, + 0x02, 0x0d, 0x70, 0x61, 0x67, 0x65, 0x73, 0x69, 0x7a, 0x65, 0x00, 0x0a, + 0x08, 0x5b, 0x82, 0x46, 0x0d, 0x45, 0x45, 0x50, 0x33, 0x08, 0x5f, 0x48, + 0x49, 0x44, 0x0d, 0x31, 0x35, 0x41, 0x43, 0x30, 0x30, 0x30, 0x33, 0x00, + 0x08, 0x5f, 0x43, 0x49, 0x44, 0x0d, 0x50, 0x52, 0x50, 0x30, 0x30, 0x30, + 0x31, 0x00, 0x08, 0x5f, 0x44, 0x44, 0x4e, 0x0d, 0x4e, 0x41, 0x49, 0x20, + 0x4d, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x62, 0x6f, 0x61, 0x72, 0x64, 0x20, + 0x45, 0x45, 0x50, 0x52, 0x4f, 0x4d, 0x20, 0x53, 0x4e, 0x00, 0x08, 0x5f, + 0x43, 0x52, 0x53, 0x11, 0x26, 0x0a, 0x23, 0x8e, 0x1e, 0x00, 0x02, 0x00, + 0x01, 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0xa0, 0x86, 0x01, 0x00, 0x5e, + 0x00, 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x50, 0x43, 0x49, 0x30, 0x2e, 0x49, + 0x32, 0x43, 0x30, 0x00, 0x79, 0x00, 0x08, 0x5f, 0x44, 0x53, 0x44, 0x12, + 0x41, 0x06, 0x02, 0x11, 0x13, 0x0a, 0x10, 0x14, 0xd8, 0xff, 0xda, 0xba, + 0x6e, 0x8c, 0x4d, 0x8a, 0x91, 0xbc, 0x9b, 0xbf, 0x4a, 0xa3, 0x01, 0x12, + 0x49, 0x04, 0x04, 0x12, 0x1c, 0x02, 0x0d, 0x63, 0x6f, 0x6d, 0x70, 0x61, + 0x74, 0x69, 0x62, 0x6c, 0x65, 0x00, 0x0d, 0x61, 0x74, 0x6d, 0x65, 0x6c, + 0x2c, 0x32, 0x34, 0x63, 0x73, 0x30, 0x32, 0x00, 0x12, 0x0a, 0x02, 0x0d, + 0x73, 0x69, 0x7a, 0x65, 0x00, 0x0a, 0x10, 0x12, 0x0e, 0x02, 0x0d, 0x70, + 0x61, 0x67, 0x65, 0x73, 0x69, 0x7a, 0x65, 0x00, 0x0a, 0x08, 0x12, 0x0e, + 0x02, 0x0d, 0x72, 0x65, 0x61, 0x64, 0x2d, 0x6f, 0x6e, 0x6c, 0x79, 0x00, + 0x01, 0x5b, 0x82, 0x4a, 0x0a, 0x52, 0x54, 0x43, 0x31, 0x08, 0x5f, 0x48, + 0x49, 0x44, 0x0d, 0x31, 0x35, 0x41, 0x43, 0x30, 0x30, 0x30, 0x34, 0x00, + 0x08, 0x5f, 0x43, 0x49, 0x44, 0x0d, 0x50, 0x52, 0x50, 0x30, 0x30, 0x30, + 0x31, 0x00, 0x08, 0x5f, 0x44, 0x44, 0x4e, 0x0d, 0x4e, 0x41, 0x49, 0x20, + 0x4d, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x62, 0x6f, 0x61, 0x72, 0x64, 0x20, + 0x57, 0x44, 0x54, 0x20, 0x52, 0x54, 0x43, 0x00, 0x08, 0x5f, 0x43, 0x52, + 0x53, 0x11, 0x26, 0x0a, 0x23, 0x8e, 0x1e, 0x00, 0x02, 0x00, 0x01, 0x02, + 0x00, 0x00, 0x01, 0x06, 0x00, 0xa0, 0x86, 0x01, 0x00, 0x68, 0x00, 0x5c, + 0x5f, 0x53, 0x42, 0x2e, 0x50, 0x43, 0x49, 0x30, 0x2e, 0x49, 0x32, 0x43, + 0x30, 0x00, 0x79, 0x00, 0x08, 0x5f, 0x44, 0x53, 0x44, 0x12, 0x37, 0x02, + 0x11, 0x13, 0x0a, 0x10, 0x14, 0xd8, 0xff, 0xda, 0xba, 0x6e, 0x8c, 0x4d, + 0x8a, 0x91, 0xbc, 0x9b, 0xbf, 0x4a, 0xa3, 0x01, 0x12, 0x20, 0x01, 0x12, + 0x1d, 0x02, 0x0d, 0x63, 0x6f, 0x6d, 0x70, 0x61, 0x74, 0x69, 0x62, 0x6c, + 0x65, 0x00, 0x0d, 0x64, 0x61, 0x6c, 0x6c, 0x61, 0x73, 0x2c, 0x64, 0x73, + 0x31, 0x33, 0x37, 0x34, 0x00, 0x5b, 0x82, 0x4e, 0x0a, 0x53, 0x50, 0x49, + 0x30, 0x08, 0x5f, 0x41, 0x44, 0x52, 0x0c, 0x02, 0x00, 0x1e, 0x00, 0x5b, + 0x82, 0x4c, 0x09, 0x50, 0x52, 0x43, 0x30, 0x08, 0x5f, 0x48, 0x49, 0x44, + 0x0d, 0x31, 0x35, 0x41, 0x43, 0x30, 0x30, 0x30, 0x31, 0x00, 0x08, 0x5f, + 0x53, 0x54, 0x52, 0x11, 0x42, 0x05, 0x0a, 0x4e, 0x4e, 0x00, 0x41, 0x00, + 0x49, 0x00, 0x20, 0x00, 0x47, 0x00, 0x53, 0x00, 0x50, 0x00, 0x49, 0x00, + 0x20, 0x00, 0x50, 0x00, 0x72, 0x00, 0x6f, 0x00, 0x63, 0x00, 0x65, 0x00, + 0x73, 0x00, 0x73, 0x00, 0x6f, 0x00, 0x72, 0x00, 0x20, 0x00, 0x52, 0x00, + 0x65, 0x00, 0x67, 0x00, 0x69, 0x00, 0x73, 0x00, 0x74, 0x00, 0x65, 0x00, + 0x72, 0x00, 0x20, 0x00, 0x43, 0x00, 0x6f, 0x00, 0x6e, 0x00, 0x74, 0x00, + 0x72, 0x00, 0x6f, 0x00, 0x6c, 0x00, 0x6c, 0x00, 0x65, 0x00, 0x72, 0x00, + 0x00, 0x00, 0x08, 0x5f, 0x43, 0x52, 0x53, 0x11, 0x29, 0x0a, 0x26, 0x8e, + 0x21, 0x00, 0x02, 0x00, 0x02, 0x02, 0x00, 0x00, 0x01, 0x09, 0x00, 0x20, + 0xa1, 0x07, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x5c, 0x5f, 0x53, 0x42, + 0x2e, 0x50, 0x43, 0x49, 0x30, 0x2e, 0x53, 0x50, 0x49, 0x30, 0x00, 0x79, + 0x00 }; -static const unsigned int acpi_dsdt_aml_len = 542; +static const unsigned int acpi_dsdt_aml_len = 1321; diff --git a/include/x86/gpio_config.h b/include/x86/gpio_config.h index 73bcd468fe..9b60d90c2b 100644 --- a/include/x86/gpio_config.h +++ b/include/x86/gpio_config.h @@ -39,6 +39,10 @@ #define GPIO_GPPC_B9_CFG_OFF (0x790) #define GPIO_GPPC_B10_CFG_OFF (0x7a0) +#define GPIO_GPPC_B15_CFG_OFF (0x7f0) +#define GPIO_GPPC_B16_CFG_OFF (0x800) +#define GPIO_GPPC_B17_CFG_OFF (0x810) +#define GPIO_GPPC_B18_CFG_OFF (0x820) #define GPIO_GPPC_C6_CFG_OFF (0x760) #define GPIO_GPPC_C7_CFG_OFF (0x770) #define GPIO_GPPC_C8_CFG_OFF (0x780) @@ -49,6 +53,8 @@ #define GPIO_GPPC_C13_CFG_OFF (0x7d0) #define GPIO_GPPC_C14_CFG_OFF (0x7e0) #define GPIO_GPPC_C15_CFG_OFF (0x7f0) +#define GPIO_GPPC_C16_CFG_OFF (0x800) +#define GPIO_GPPC_C17_CFG_OFF (0x810) #define GPIO_GPPC_C20_CFG_OFF (0x840) #define GPIO_GPPC_C21_CFG_OFF (0x850) #define GPIO_GPPC_C22_CFG_OFF (0x860) @@ -688,6 +694,109 @@ static const struct tgl_gpio_conf gpio_table_presilicon[] = { .gpio_rxinv = 0x00, .gpio_rxevconf = 0x02, .gpio_reset = GPIO_RESET_PLTRST}, + /* GSPI0 (B15-B18) and I2C0 (C16/C17) in native mode, as stock. */ + /* PAD B15 (DW0=0x44000601 DW1=0x00000027) */ + {.gpio = + { + .comm_port_id = GPIO_COMM_0_PORT_ID, + .cfg_offset = GPIO_GPPC_B15_CFG_OFF, + }, + .flags = + (GPIO_SET_MODE | GPIO_SET_DIRECTION | GPIO_SET_RESET | + GPIO_SET_TERM | GPIO_SET_INTERRUPT | GPIO_SET_RXINV | + GPIO_SET_RXEVCONF), + .gpio_mode = GPIO_MODE_NATIVE_1, + .gpio_dir = GPIO_DIR_OUTPUT, + .gpio_term = GPIO_TERM_NONE, + .gpio_interrupt = 0x00, + .gpio_rxinv = 0x00, + .gpio_rxevconf = 0x02, + .gpio_reset = GPIO_RESET_HOSTDEEPRESET}, + /* PAD B16 (DW0=0x84000601 DW1=0x00000028) */ + {.gpio = + { + .comm_port_id = GPIO_COMM_0_PORT_ID, + .cfg_offset = GPIO_GPPC_B16_CFG_OFF, + }, + .flags = + (GPIO_SET_MODE | GPIO_SET_DIRECTION | GPIO_SET_RESET | + GPIO_SET_TERM | GPIO_SET_INTERRUPT | GPIO_SET_RXINV | + GPIO_SET_RXEVCONF), + .gpio_mode = GPIO_MODE_NATIVE_1, + .gpio_dir = GPIO_DIR_OUTPUT, + .gpio_term = GPIO_TERM_NONE, + .gpio_interrupt = 0x00, + .gpio_rxinv = 0x00, + .gpio_rxevconf = 0x02, + .gpio_reset = GPIO_RESET_PLTRST}, + /* PAD B17 (DW0=0x44000702 DW1=0x00010029) */ + {.gpio = + { + .comm_port_id = GPIO_COMM_0_PORT_ID, + .cfg_offset = GPIO_GPPC_B17_CFG_OFF, + }, + .flags = + (GPIO_SET_MODE | GPIO_SET_DIRECTION | GPIO_SET_RESET | + GPIO_SET_TERM | GPIO_SET_INTERRUPT | GPIO_SET_RXINV | + GPIO_SET_RXEVCONF), + .gpio_mode = GPIO_MODE_NATIVE_1, + .gpio_dir = 0x03, + .gpio_term = GPIO_TERM_NONE, + .gpio_interrupt = 0x00, + .gpio_rxinv = 0x00, + .gpio_rxevconf = 0x02, + .gpio_reset = GPIO_RESET_HOSTDEEPRESET}, + /* PAD B18 (DW0=0x84000600 DW1=0x0000002A) */ + {.gpio = + { + .comm_port_id = GPIO_COMM_0_PORT_ID, + .cfg_offset = GPIO_GPPC_B18_CFG_OFF, + }, + .flags = + (GPIO_SET_MODE | GPIO_SET_DIRECTION | GPIO_SET_RESET | + GPIO_SET_TERM | GPIO_SET_INTERRUPT | GPIO_SET_RXINV | + GPIO_SET_RXEVCONF), + .gpio_mode = GPIO_MODE_NATIVE_1, + .gpio_dir = GPIO_DIR_OUTPUT, + .gpio_term = GPIO_TERM_NONE, + .gpio_interrupt = 0x00, + .gpio_rxinv = 0x00, + .gpio_rxevconf = 0x02, + .gpio_reset = GPIO_RESET_PLTRST}, + /* PAD C16 (DW0=0x44000702 DW1=0x0000001E) */ + {.gpio = + { + .comm_port_id = GPIO_COMM_4_PORT_ID, + .cfg_offset = GPIO_GPPC_C16_CFG_OFF, + }, + .flags = + (GPIO_SET_MODE | GPIO_SET_DIRECTION | GPIO_SET_RESET | + GPIO_SET_TERM | GPIO_SET_INTERRUPT | GPIO_SET_RXINV | + GPIO_SET_RXEVCONF), + .gpio_mode = GPIO_MODE_NATIVE_1, + .gpio_dir = 0x03, + .gpio_term = GPIO_TERM_NONE, + .gpio_interrupt = 0x00, + .gpio_rxinv = 0x00, + .gpio_rxevconf = 0x02, + .gpio_reset = GPIO_RESET_HOSTDEEPRESET}, + /* PAD C17 (DW0=0x44000702 DW1=0x0000001F) */ + {.gpio = + { + .comm_port_id = GPIO_COMM_4_PORT_ID, + .cfg_offset = GPIO_GPPC_C17_CFG_OFF, + }, + .flags = + (GPIO_SET_MODE | GPIO_SET_DIRECTION | GPIO_SET_RESET | + GPIO_SET_TERM | GPIO_SET_INTERRUPT | GPIO_SET_RXINV | + GPIO_SET_RXEVCONF), + .gpio_mode = GPIO_MODE_NATIVE_1, + .gpio_dir = 0x03, + .gpio_term = GPIO_TERM_NONE, + .gpio_interrupt = 0x00, + .gpio_rxinv = 0x00, + .gpio_rxevconf = 0x02, + .gpio_reset = GPIO_RESET_HOSTDEEPRESET}, }; #else /* TARGET_kontron_vx3060_s2 */ diff --git a/src/x86/acpi_dsdt.asl b/src/x86/acpi_dsdt.asl index 0a9b66f121..0516aa6333 100644 --- a/src/x86/acpi_dsdt.asl +++ b/src/x86/acpi_dsdt.asl @@ -1,7 +1,7 @@ /* acpi_dsdt.asl * * Minimal DSDT for the NAI 68INT6: the PCI root bus with its _CRS and the - * _PRT INTx routing. Compiled offline with iasl and committed as a C array. + * _PRT INTx routing, plus the board devices on LPSS I2C0 and GSPI0. Compiled offline with iasl and committed as a C array. * * Regenerate after editing: * iasl src/x86/acpi_dsdt.asl @@ -84,6 +84,95 @@ DefinitionBlock ("", "DSDT", 2, "WOLFBT", "NAITGL", 0x00000001) 0x0000000000000000, 0x0000004000000000, 0x0000007FFFFFFFFF, 0x0000000000000000, 0x0000004000000000) }) + + /* LPSS I2C0 and GSPI0 with the board devices the stock BIOS + * declares, so NAI's Linux drivers (naigspi, at24) bind. */ + Device (I2C0) + { + Name (_ADR, 0x00150000) + + Device (EEP2) + { + Name (_HID, "15AC0002") + Name (_CID, "PRP0001") + Name (_DDN, "NAI Motherboard EEPROM") + Name (_CRS, ResourceTemplate () + { + I2cSerialBusV2 (0x0056, ControllerInitiated, 100000, + AddressingMode7Bit, "\\_SB.PCI0.I2C0") + }) + Name (_DSD, Package () + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () + { + Package () { "compatible", "atmel,24c02" }, + Package () { "size", 256 }, + Package () { "pagesize", 8 } + } + }) + } + + Device (EEP3) + { + Name (_HID, "15AC0003") + Name (_CID, "PRP0001") + Name (_DDN, "NAI Motherboard EEPROM SN") + Name (_CRS, ResourceTemplate () + { + I2cSerialBusV2 (0x005E, ControllerInitiated, 100000, + AddressingMode7Bit, "\\_SB.PCI0.I2C0") + }) + Name (_DSD, Package () + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () + { + Package () { "compatible", "atmel,24cs02" }, + Package () { "size", 16 }, + Package () { "pagesize", 8 }, + Package () { "read-only", One } + } + }) + } + + Device (RTC1) + { + Name (_HID, "15AC0004") + Name (_CID, "PRP0001") + Name (_DDN, "NAI Motherboard WDT RTC") + Name (_CRS, ResourceTemplate () + { + I2cSerialBusV2 (0x0068, ControllerInitiated, 100000, + AddressingMode7Bit, "\\_SB.PCI0.I2C0") + }) + Name (_DSD, Package () + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () + { + Package () { "compatible", "dallas,ds1374" } + } + }) + } + } + + Device (SPI0) + { + Name (_ADR, 0x001E0002) + + Device (PRC0) + { + Name (_HID, "15AC0001") + Name (_STR, Unicode ("NAI GSPI Processor Register Controller")) + Name (_CRS, ResourceTemplate () + { + SpiSerialBusV2 (0x0000, PolarityLow, FourWireMode, 8, + ControllerInitiated, 500000, ClockPolarityLow, + ClockPhaseFirst, "\\_SB.PCI0.SPI0") + }) + } + } } } } diff --git a/src/x86/tgl_fsp.c b/src/x86/tgl_fsp.c index 03066e6f82..c9092ba221 100644 --- a/src/x86/tgl_fsp.c +++ b/src/x86/tgl_fsp.c @@ -1035,6 +1035,8 @@ int fsp_machine_update_s_parameters(uint8_t *default_s_params) upd->Cx = FSP_C_STATES; upd->TxtEnable = FSP_TXT; upd->ThermalMonitor = FSP_THERMAL_THROTTLING; + /* I2C0 (PCI mode) carries the board EEPROMs and the watchdog RTC */ + upd->SerialIoI2cMode[0] = 1; #endif return 0; }