[glampert]

The emitter pads each basic block for the latencies still in flight from the code before it in program order. It pads for nothing that a branch into the block leaves in flight. Its padding for the code that falls into a label is also one cycle short.

Three of the resulting hazards are not interlocked, so they silently read old values:

• Clip flags: an fcand after a join read the flags 3 cycles after a clipw on the other path; they land after 4.
• MAC flags: an fmand after a join had the same problem.
• Branch conditions: a VI loaded before a join was tested too early on one path.

VF registers and VI loads are interlocked. For them, the missing padding only turns a nop into a stall at the same cycle, so the timing doesn't change. The fix pads them too, because the emitter's tracker models them like everything else.

Fix

• Each branch records what its target inherits: the latencies still pending when it is taken, measured from the target's first issue cycle, keeping the largest over all branches to that label. VuLatencyTracker::merge combines the records.
• At each label the emitter merges the record into its own tracker, and pads the scheduled slots for anything the schedule did not see.
• The program is re-emitted until the records stop growing. Padding only moves a branch further from the writes before it, so they converge. The schedule itself is computed once.

Effect

On a local corpus of 46 programs, against current master:

• 16 programs change, all by added nop pairs: 11 of the 12 ps2gl fixtures, ps2gl's scei, and 4 small repros.
• The ps2gl changes are 1 to 6 lines each, in the light and transform loops.
• quake2-ps2 and Tyra are byte-identical.
• vu-checker's latency findings on the clip and MAC join repros are fixed.

Tests

test/integration/test_cross_block_latency.cpp, 6 cases; the first 5 fail on master without this change:

• the clip flags are read 4 cycles after the clipw on every path into a join;
• the MAC flags are read 4 cycles after the operation on every path into a join;
• a register loaded before a label or a branch is read 4 cycles later on every path;
• a VI loaded before a join is tested 5 cycles later on every path;
• a vertex colour written lane by lane before a join is stored after the lanes land;
• a join with nothing in flight on either path gets no padding.

[fjtrujy]

LGTM!